NAND circuit

https://w3id.org/framester/wn/wn30/instances/synset-NAND_circuit-noun-1 <https://w3id.org/framester/wn/wn30/schema/NounSynset>

rdfs:label

xsd:string NAND circuit

<https://w3id.org/framester/wn/wn30/schema/ukbsynsetId>

xsd:string 03806748-n

<https://w3id.org/framester/wn/wn30/schema/senseLabel>

NAND circuit

NAND gate

<https://w3id.org/framester/wn/wn30/schema/mapsToWN20synsetId>

103663783

<https://w3id.org/framester/sentiwordnet/negScore>

xsd:string 0

<https://w3id.org/framester/sentiwordnet/posScore>

xsd:string 0

<https://w3id.org/framester/wn/wn30/schema/gloss>

a logic gate that produces an output that is the inverse of the output of an AND gate

<https://w3id.org/framester/wn/wn30/schema/synsetId>

xsd:string 103806748

<https://w3id.org/framester/wn/wn30/schema/NounSynset>

<http://www.ontologydesignpatterns.org/ont/own3/own2dul.owl#dul>

<http://www.ontologydesignpatterns.org/ont/dul/DUL.owl#DesignedArtifact>

<https://w3id.org/framester/wn/wn30/wndomains/synsetDomain>

<https://w3id.org/framester/wn/wn30/wndomains/wn-domain-computer_science>

<https://w3id.org/framester/wn/wn30/schema/containsWordSense>

<https://w3id.org/framester/wn/wn30/instances/wordsense-NAND_circuit-noun-1>

<https://w3id.org/framester/wn/wn30/instances/wordsense-NAND_gate-noun-1>

<http://www.ontologydesignpatterns.org/ont/own3/own2dul.owl#d0>

<http://www.ontologydesignpatterns.org/ont/dul/DUL.owl#PhysicalObject>

<http://www.ontologydesignpatterns.org/ont/own3/own2dul.owl#hyp>

<https://w3id.org/framester/wn/wn30/instances/synset-instrumentality-noun-3>

<http://www.ontologydesignpatterns.org/ont/own3/own2dul.owl#proxhyp>

<https://w3id.org/framester/wn/wn30/instances/synset-gate-noun-2>

<https://w3id.org/framester/wn/wn30/schema/hyponymOf>

<https://w3id.org/framester/wn/wn30/instances/synset-gate-noun-2>

<https://w3id.org/framester/wn/wn30/schema/lexname>

<https://w3id.org/framester/wn/wn30/instances/supersense-noun_artifact>

risorse dalla linked data cloud